Semidynamics to show memory-centric AI inference stack at ISC HPC 2026

Semidynamics will unveil its full inference platform at ISC High Performance 2026 in Hamburg, positioning memory architecture as the key bottleneck in AI inference. The Barcelona company is also highlighting its 3nm tape-out, planned production silicon later this year and an open software stack aimed at avoiding vendor lock-in.

Why it matters: - AI inference performance depends on more than raw compute. Semidynamics is arguing that memory bandwidth, capacity and architecture now determine whether AI silicon can deliver usable throughput in production. - The company is targeting a pain point for cloud and HPC operators: expensive accelerator racks that underperform because memory cannot keep tensor units fed. - Semidynamics is pitching an inference platform built around open standards, including RISC-V, OCP-compliant rack design and existing AI software tools.

What happened: - Semidynamics CEO Roger Espasa will present the company’s full memory-centric inference platform at ISC High Performance 2026 in Hamburg from 23-25 June at booth A22, Hall H. - The Barcelona-based company will show its stack from RISC-V core to liquid-cooled rack at a major HPC trade show for the first time. - Semidynamics taped out its first 3nm chip with TSMC in December 2025. - The company says a production tape-out is planned later this year.

The details: - The platform is built around the idea that peak TOPS is not the same as delivered performance in production. - Semidynamics says conventional systems are constrained by expensive, supply-limited HBM and by paging KV-caches in and out when memory runs short. - The company’s Gazzillion™ subsystem is designed to tolerate memory latency end to end and keep tensor units continuously fed. - Semidynamics says that approach allows the platform to use high-capacity LPDDR from the core up instead of premium HBM. - The 3nm silicon is presented as proof that the architecture works. - The company says the result is multiples of conventional rack memory capacity, very large resident KV-caches and sustained throughput at high user concurrency. - At ISC HPC 2026, Semidynamics will present four layers of its inference platform: the Inference Engine, the Inference SOC, the Inference Board and an Inference Rack. - The Inference Engine is an out-of-order 64-bit RISC-V core with integrated vector and tensor units and the Gazzillion memory subsystem. - The Inference SOC is a 3nm device that combines multiple Inference Engines and can run standard Linux workloads. - The Inference Board pairs a general-purpose host with Inference SOCs over a high-bandwidth fabric engineered for persistent KV-cache residency across long context lengths. - The Inference Rack is liquid-cooled and OCP-compliant for standard data centre integration. - Semidynamics says the December 2025 tape-out is among the first 3nm tape-outs achieved by a European semiconductor company.

Between the lines: - Semidynamics is framing memory architecture as the main differentiator in AI inference, not the accelerator core itself. - The pitch is as much about economics as performance. If the memory system keeps the compute busy, the company argues, operators get better utilisation and lower token cost. - The message also fits Europe’s push for sovereign AI infrastructure, where control over design and standards matters as much as where chips are manufactured. - Semidynamics has also announced a strategic cooperation with SiPearl to develop an EU-sovereign, OCP-based rack-scale AI compute platform for large-scale cloud inference. - That joint effort combines SiPearl’s Arm-based CPU for host compute and orchestration with Semidynamics’ RISC-V-based inference accelerator. - The company has secured a strategic investment from SK hynix to co-optimise its architecture with next-generation memory technologies. - The software stack is meant to reduce adoption friction. Semidynamics says Aliado Orchestrator and AKL run existing AI tools including vLLM, PyTorch and ONNX Runtime, with support for models such as Llama and DeepSeek directly from Hugging Face. - Semidynamics says inference works without a proprietary migration path.

What's next: - Semidynamics will use ISC HPC 2026 to position its platform for HPC and large-scale cloud inference buyers. - The company plans a production tape-out later in 2026. - The broader European AI infrastructure market is likely to remain a key target as EuroHPC AI Factory and Gigafactory programmes expand. - Semidynamics says its next step is to bring the architecture from silicon proof point to production deployment.

The bottom line: - Semidynamics is betting that the next AI infrastructure advantage comes from memory-first system design, not just faster compute.